1. Technical Field
The invention relates to a metal capacitor and a method of fabricating the same, and more particularly, to a metal capacitor including a lower metal electrode having hemispherical metal grains thereon and a method of fabricating such a metal capacitor.
2. Description of the Related Art
While thorough research into semiconductor techniques has been conducted, semiconductor devices, in particular, memory devices, have greatly improved. In addition, techniques for realizing high speeds, low power consumption, large capacity, and miniaturization have been extensively and intensively studied, and specifically, techniques for increasing the degree of integration are making rapid progress. A high degree of integration of a semiconductor device may be achieved by simultaneously developing circuit design techniques, materials and various process techniques.
In order to fabricate a semiconductor memory device having a high degree of integration and a large capacity, power consumption and operational voltage should be decreased in the interest of fast operation of the device, and capacitance suitable for stable operation of the capacitor should be ensured. Moreover, high capacitance of the capacitor is regarded as important with respect to the process of fabricating the semiconductor device.
With the goal of increasing the capacitance of the capacitor, there are proposed methods of increasing the dielectric constant of a dielectric layer, of increasing the area of upper/lower electrodes facing each other, and of decreasing the distance between upper/lower electrodes. Among these methods, a technique of roughening the surface of a lower electrode of a capacitor to increase the surface area thereof is receiving attention. This is because the technique of roughening the surface of the lower electrode of the capacitor enables the realization of high capacitance without increasing the volume or size of the capacitor, as in conventional methods. Thus, this technique is more favorable in terms of the degree of integration, compared to methods of altering the shape of the capacitor.
In the technique of roughening the surface of the lower electrode of the capacitor, a process of embossing the surface of the lower electrode of the capacitor is receiving a lot of attention. Specifically, hemispherical grains are formed on the lower electrode made of polycrystalline silicon, thus increasing the surface area of the lower electrode. Therein, the hemispherical grains are formed in a manner such that nuclei of the hemispherical grains are produced at a dangling bond site of polycrystalline silicon and then grown through deposition or out-diffusion.
However, the process of forming the hemispherical grains suffers because it may be applied only when using polycrystalline silicon, and cannot be used in a metal electrode structure of a next-generation capacitor which is operated at high speeds under conditions of a high degree of integration and reduced power consumption. In addition, when a reverse bias is applied to the capacitor using polycrystalline silicon to store data, a depletion region is enlarged. In this way, due to the enlargement of the depletion region, the distance between the upper and lower electrodes is increased, undesirably decreasing capacitance.
Therefore, in order to prevent the decrease of capacitance upon the application of a reverse bias, metal capacitors having upper and lower electrodes formed of metal have been proposed.